Wikipedia

Qualcomm Hexagon

Hexagonis the brand name for a family ofdigital signal processor(DSP) and laterneural processing unit(NPU) products byQualcomm.[2]Hexagon is also known as QDSP6, standing for “sixth generation digital signal processor.” According to Qualcomm, the Hexagon architecture is designed to deliver performance with low power over a variety of applications.[3][4]

Hexagon
DesignerQualcomm
Bits32-bit, 64-bit
Introduced2006 (QDSP6)
Design4-way multithreadedVLIW
TypeLoad–store
EncodingFixed 4 byte per instruction, up to 4 instructions in VLIW multiinstruction
OpenProprietary
Registers
General-purpose32-bit GPR: 32, can be paired to 64-bit[1]

Each version of Hexagon has an instruction set and a micro-architecture. These two features are intimately related.

Hexagon is used inQualcomm Snapdragonchips, for example in smartphones, cars, wearable devices and other mobile devices and is also used in components of cellular phone networks.

Instruction set architecture

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Computing devices have instruction sets, which are their lowest, most primitive languages. Common instructions are those which cause two numbers to be added, multiplied or combined in other ways, as well as instructions that direct the processor where to look in memory for its next instruction. There are many other types of instructions.

Assemblers and compilers that translate computer programs into streams of instructions – bit streams - that the device can understand and carry out (execute). As an instruction stream executes, the integrity of system function is supported by the use of instruction privilege levels. Privileged instructions have access to more resources in the device, including memory. Hexagon supports privilege levels.

Originally, Hexagon instructions operated on integer numbers but not floating point numbers,[5]but in v5 floating point support was added.[6]

The processing unit which handles execution of instructions is capable of in-order dispatching up to 4 instructions (the packet) to 4Execution Unitsevery clock.[7][8]

Micro-architecture

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Micro-architecture is the physical structure of a chip or chip component that makes it possible for a device to carry out the instructions. A given instruction set can be implemented by a variety of micro-architectures. The buses – data transfer channels – for Hexagon devices are 32 bits wide. That is, 32 bits of data can be moved from one part of the chip to another in a single step. The Hexagon micro-architecture is multi-threaded,[4]which means that it can simultaneously process more than one stream of instructions, enhancing data processing speed. Hexagon supports very long instruction words,[9][10]which are groupings of four instructions that can be executed “in parallel.” Parallel execution means that multiple instructions can run simultaneously without one instruction having to complete before the next one starts. The Hexagon micro-architecture supports single instruction, multiple data operations,[11]which means that when a Hexagon device receives an instruction, it can carry out the operation on more than one piece of data at the same time.

According to 2012 estimation, Qualcomm shipped 1.2 billion DSPcoresinside itssystem on a chip (SoCs)(average 2.3 DSP core per SoC) in 2011, and 1.5 billion cores were planned for 2012, making the QDSP6 the most shipped architecture of DSP[12](CEVAhad around 1 billion of DSP cores shipped in 2011 with 90% of IP-licensable DSP market[13]).

The Hexagon architecture is designed to deliver performance with low power over a variety of applications. It has features such as hardware assistedmultithreading,privilege levels,Very Long Instruction Word (VLIW),Single Instruction Multiple Data (SIMD),[14][15]and instructions geared toward efficient signal processing. Hardware multithreading is implemented asbarreltemporal multithreading- threads are switched in round-robin fashion each cycle, so the 600 MHz physical core is presented as three logical 200 MHz cores before V5.[16][17]Hexagon V5 switched to dynamic multithreading (DMT) withthread switchon L2 misses, interrupt waiting or on special instructions.[17][18]

At Hot Chips 2013 Qualcomm announced details of their Hexagon 680 DSP. Qualcomm announced Hexagon Vector Extensions (HVX). HVX is designed to allow significant compute workloads for advanced imaging and computer vision to be processed on the DSP instead of the CPU.[19]In March 2015 Qualcomm announced their Snapdragon Neural Processing Engine SDK which allowAI accelerationusing the CPU, GPU and Hexagon DSP.[20]

Qualcomm'sSnapdragon 855contains their 4th generation on-device AI engine, which includes the Hexagon 690 DSP and Hexagon Tensor Accelerator (HTA) forAI acceleration.[21]Snapdragon 865contains the 5th generation on-device AI engine based on the Hexagon 698 DSP capable of 15 trillion operations per second (TOPS).[22]Snapdragon 888contains the 6th generation on-device AI engine based on the Hexagon 780 DSP capable of 26 TOPS.[23]Snapdragon 8contains the 7th generation on-device AI engine based on the Hexagon DSP capable of 52 TOPS and up to 104 TOPS in some cases.[24]

Software support

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Operating systems

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TheportofLinuxfor Hexagon runs under ahypervisorlayer ( "Hexagon Virtual Machine"[25]) and was merged with the 3.2 release of thekernel.[26][27]The original hypervisor is closed-source, and in April 2013 a minimal open-source hypervisor implementation for QDSP6 V2 and V3, the "Hexagon MiniVM" was released by Qualcomm under aBSD-style license.[28][29]

Compilers

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Support for Hexagon was added in 3.1 release ofLLVMby Tony Linthicum.[30]Hexagon/HVX V66 ISA support was added in 8.0.0 release ofLLVM.[31]There is also a non-FSFmaintained branch ofGCCandbinutils.[32]

Adoption of the SIP block

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Qualcomm Hexagon DSPs have been available inQualcomm Snapdragon SoCsince 2006.[33][34]In Snapdragon S4 (MSM8960 and newer) there are three QDSP cores, two in the Modem subsystem and one Hexagon core in the Multimedia subsystem. Modem cores are programmed by Qualcomm only, and only Multimedia core is allowed to be programmed by user.

They are also used in somefemtocellprocessors of Qualcomm, including FSM98xx, FSM99xx and FSM90xx.[35]

Third-party integration

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In March 2016, it was announced that semiconductor companyConexant's AudioSmart audio processing software was being integrated into Qualcomm's Hexagon.[36]

In May 2018wolfSSLadded support for using Qualcomm Hexagon.[37]This is support for running wolfSSL crypto operations on the DSP. In addition to use of crypto operations a specialized operation load management library was later added.

Versions

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There are six versions of QDSP6 architecture released: V1 (2006), V2 (2007–2008), V3 (2009), V4 (2010–2011), QDSP6 V5 (2013, in Snapdragon 800[38]); and QDSP6 V6 (2016, in Snapdragon 820).[34]V4 has 20 DMIPS per milliwatt, operating at 500 MHz.[33][34] Clock speed of Hexagon varies in 400–2000 MHz for QDSP6 and in 256–350 MHz for previous generation of the architecture, the QDSP5.[39]

Versions of QDSP6 Process node, nm Year[17] Number of simultaneous threads Per-thread clock, MHz Total core clock, MHz Product
QDSP6 V1 65[17] 2006
QDSP6 V2[40] 65 2007[17] 6 100 600
QDSP6 V3 (1st gen)[40] 45 2009 6 67 400
QDSP6 V3 (2nd gen)[40] 45 2009 4 100 400
QDSP6 V4[40](V4M, V4C, V4L[17]) 28 2010 3[18] 167 500 Snapdragon

600

QDSP6 V5[41](V5A, V5H[17]) 28 2013 3[17] 200 or greater with DMT[18] 600 Snapdragon

410/412/800/801

536 12/28 2014 205/208/210/212

Snapdragon 425/427/429/430/435/439

V50 28 2014 Snapdragon

415/610/615/616/805

546 14/28 2015 Snapdragon

450/617/625/626/632

V56 20/28 2015 Snapdragon

650/652/653/808/810

642 14 2017 Snapdragon

630

QDSP6 V6 or 680 14 2016 4 500 2000 (820[42][43]& 821)

787 (660)[44]

Snapdragon

820/821/636/660

682 10 2017 Snapdragon

835

683 11 2020 Snapdragon

662/460

685 10/11 2018 (3 TOPS) Snapdragon

850/845/670/675/678/710/712

686 6/8/11 2019 (3.3 TOPS) Snapdragon

695/685/680/665/480/480+

688 8 2019 (3.6 TOPS) Snapdragon

730(G)/732G

690 7 2019 (7 TOPS) Snapdragon

855/855+/860/8c/8cx
Microsoft SQ1/SQ2

692 8 2020 (5 TOPS) Snapdragon

720G/690/7c

694 8 2020 (4.7 TOPS) Snapdragon

750G

696 7 2020 (5.4 TOPS) Snapdragon

765(G)/768G

698 7 2020 (15 TOPS) Snapdragon

865/865+/870

770 5/6 2021 (12 TOPS) Snapdragon

778G/778G+/780G/782G

780 5 2021 (26 TOPS/ 32TOPS) Snapdragon

888/888+

790 ? 2022 ? Snapdragon 8 gen 1 / 8+ gen 1

Availability in Snapdragon products

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Both Hexagon (QDSP6) and pre-Hexagon (QDSP5) cores are used in modern Qualcomm SoCs, QDSP5 mostly in low-end products. Modem QDSPs (often pre-Hexagon) are not shown in the table.

QDSP5 usage:

Snapdragon generation Chipset (SoC) ID DSP generation DSP frequency, MHz Process node, nm
S1[39] MSM7627, MSM7227, MSM7625, MSM7225 QDSP5 320 65
S1[39] MSM7627A, MSM7227A, MSM7625A, MSM7225A QDSP5 350 45
S2[39] MSM8655, MSM8255, APQ8055, MSM7630, MSM7230 QDSP5 256 45
S4 Play[39] MSM8625, MSM8225 QDSP5 350 45
S200[45] 8110, 8210, 8610, 8112, 8212, 8612, 8225Q, 8625Q QDSP5 384 45 LP

QDSP6 (Hexagon) usage:

Snapdragon generation Chipset (SoC) ID QDSP6 version DSP frequency, MHz Process node, nm
S1[39] QSD8650, QSD8250 QDSP6 600 65
S3[39] MSM8660, MSM8260, APQ8060 QDSP6 (V3?) 400 45
S4 Prime[39] MPQ8064 QDSP6 (V3?) 500 28
S4 Pro[39] MSM8960 Pro, APQ8064 QDSP6 (V3?) 500 28
S4 Plus[39] MSM8960, MSM8660A, MSM8260A, APQ8060A, MSM8930,
MSM8630, MSM8230, APQ8030, MSM8627, MSM8227		 QDSP6 (V3?) 500 28
S400[45] 8926, 8930, 8230, 8630, 8930AB, 8230AB, 8630AB, 8030AB, 8226, 8626 QDSP6V4 500 28 LP
S600[45] 8064T, 8064M QDSP6V4 500 28 LP
S800[45] 8974, 8274, 8674, 8074 QDSP6V5A 600 28 HPm
S820[42] 8996 QDSP6V6 2000 14 FinFET LPP

Hardware codec supported

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The different video codecs supported by the Snapdragon SoCs.

D- decode;E- encode

FHD= FullHD = 1080p = 1920x1080px

HD= 720p which can be 1366x768px or 1280x720px

Snapdragon 200 series

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The different video codecs supported by the Snapdragon 200 series.

Codec Snapdragon

200[46]

Snapdragon

200[46]

Qualcomm

205[47]

Snapdragon

208/210[48]

Snapdragon

212[49]

Availability 2013 2013 2017 2014 2015
Hexagon QDSP5 QDSP6 536 536 536
H263 D & E D & E D & E D & E D & E
VC-1
H.264 D & E D & E D & E D & E D & E
H.264 10-bit - - - - -
VP8 D & E D & E D & E D & E D & E
H.265 D HD & E HD D HD & E HD D HD & E HD D FHD & E HD D FHD & E HD
H.265 10-bit - - - - -
H.265 12-bit - - - - -
VVC
VP9 - - - - -
VP9 10-bit - - - - -
AV1 - - - - -

Snapdragon 400 series

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The different video codecs supported by the Snapdragon 400 series.

Codec Snapdragon

400[50]

Snapdragon

410/415[51]

Snapdragon

425/427

Snapdragon

429/439[52]

Snapdragon

450[53]

Snapdragon

460[54]

Snapdragon

480/480+[55]

Availability Q4 2013 2014/2015 Q1 2016/Q3 2017 Q2 2018 Q2 2017 Q1 2020 Q1 2021
Hexagon QDSP6 QDSP6 V5 536(256KB) 536 546 683 686
H263 D & E D & E D & E D & E D & E D & E D & E
VC-1
H.264 D & E D & E D & E D & E D & E D & E D & E
H.264 10-bit - - - - - - D & E
VP8 D & E D & E D & E D & E D & E D & E D & E
H.265 - D & E D & E D & E D & E D & E D & E
H.265 10-bit - - - - - -
H.265 12-bit - - - - - -
VVC - - - - - -
VP9 - - - - D & E D & E
VP9 10-bit - - - - - -
AV1 - - - - - - -
Video frame rate

support Decoding

HD 60 fps
FHD 60 fps FHD 60 fps FHD 60 fps
Video frame

rate support

Encoding

HD 60 fps
FHD 60 fps FHD 60 fps FHD 60 fps

Snapdragon 600 series

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The different video codecs supported by the Snapdragon 600 series.

Codec Snapdragon 600[56] Snapdragon 610[57] Snapdragon 650/652/653 Snapdragon 630[58] Snapdragon 632[52] Snapdragon 636/660[58] Snapdragon 662[59] Snapdragon 665[60] Snapdragon 670/675/678[61] Snapdragon 690[62]
Availability Q1 2013 Q1 2015 Q2 2018 Q1 2020 Q2 2019 2019 Q2 2020
Hexagon QDSP6 V4 QDSP6 V50 QDSP6 V56 642 546 680 683 686 685 692
H263 D & E D & E D & E D & E D & E D & E D & E D & E D & E D & E
VC-1 D[63]&?
H.264 D & E D & E D & E D & E D & E D & E D & E D & E D & E D & E
H.264 10-bit - - - - - - - - -
VP8 D & E D & E D & E D & E D & E D & E D & E D & E D & E D & E
H.265 - D & E D & E D & E D & E D & E D & E D & E D & E
H.265 10-bit - - - D &? - D &? - - D & E
VVC - - - - - - - - - -
VP9 - - D[63]&? D & E D & E D & E D & E D & E D & E D & E
VP9 10-bit - - - - - - - - -
AV1 - - - - - - - - - -
FPS
Video decoding frame rate support HD 60 fps HD 120 fps HD 240 fps[64] HD 240 fps HD 240 fps[65] HD 60 fps HD 240 fps HD 240 fps HD 240 fps
FHD 30 fps FHD 60 fps FHD 120 fps FHD 120 fps[64] FHD 120 fps FHD 120 fps[65] FHD 60 fps FHD 120 fps FHD 120 fps FHD 120 fps
No 4K No 4K 4K30 fps 4K30 fps[64] 4K30 fps 4K30 fps[65] No 4K 4K60 fps 4K60 fps[61] 4K60 fps
Video encoding frame rate support HD 60 fps HD 60 fps HD 240 fps[64] HD 240 fps HD 240 fps[65] HD 60 fps HD 240 fps HD 240 fps HD 240 fps
FHD 30 fps FHD 30 fps FHD 120 fps FHD 120 fps[64] FHD 120 fps FHD 120 fps[65] FHD 60 fps FHD 120 fps FHD 120 fps FHD 120 fps
No 4K No 4K 4K30 fps 4K30 fps[64] 4K30 fps 4K30 fps[65] No 4K 4K30 fps 4K30 fps 4K30 fps
HDRformats
Display and

playback

HDR10,HLG
Video

recording

HDR10,HLG

Snapdragon 700 series

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The different video codecs supported by the Snapdragon 700 series.

Codec Snapdragon

710[66]/712[67]

Snapdragon

720G[68]

Snapdragon

730G[69]/732G[70]

Snapdragon

765[71]/765G[72]

/768G[72]

Snapdragon

778G[73]

Snapdragon

780G[74]

Availability Q2 2018 / Q1 2019 Q1 2020 Q2 2019 / Q3 2020 Q2 2019 / Q2 2019 / Q2 2020 Q2 2021 Q1 2021
Hexagon 685 692 688 696 770 770
H263 D & E D & E D & E D & E
VC-1 D & E D & E D & E D & E
H.264 D & E D & E D & E D & E
H.264 10-bit - - ? ?
VP8 D & E D & E D & E D & E
H.265 D & E D & E D & E D & E
H.265 10-bit D D D & E D & E
H.265 12-bit - - - -
VVC - - - -
VP9 D & E D & E D & E D & E
VP9 10-bit D D D D
AV1 - - - -
FPS
Video frame

rate support

Decoding

HD 240 fps HD 240 fps HD 240 fps HD 480 fps
FHD 120 fps FHD 120 fps FHD 120 fps ?
4K 30fps 4K 30fps 4K 30fps 4K 60fps
Video frame

rate support

Encoding

HD 240 fps HD 240 fps HD 240 fps HD 480 fps
FHD 120 fps FHD 120 fps FHD 120 fps ?
4K 30fps 4K 30fps 4K 30fps ?
HDRformats
Display and

playback

10-bitHDR HDR10,HLG HDR10,HLG,HDR10+
Video

recording

— — HDR10,HLG HDR10,HLG,HDR10+
Photo

recording

— — — — 10-bitHDRHEIF

Snapdragon 800 series

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The different video codecs supported by the Snapdragon 800 series.

Codec Snapdragon

800[75]

Snapdragon

801[75]

Snapdragon

805[76]

Snapdragon

810[77]

Snapdragon

820/821[78]

Snapdragon

835[79]

Snapdragon

845/850[80]

Snapdragon

855/855+[81]

Snapdragon

865/865+

/870[82]

Snapdragon

888[83]

Snapdragon

8 gen 1

Availability Q2 2013 Q1 2014 Q1 2014 Q3 2014 Q4 2015

Q3 2016

Q2 2017 Q1 2018 2019 2019

2021

Q4 2020 2021
Hexagon QDSP6 V5 QDSP6 V5 QDSP6 V50 QDSP6 V56 680 682 685 690[84] 698 780 790
MPEG-4 D & E D & E D & E D & E D & E D & E D & E D & E D & E D & E
H263 D & E D & E D & E D & E D & E[85] D & E D & E D & E D & E D & E
VC-1 D & E D & E D & E D & E D & E D & E
H.264 D & E D & E D & E D & E D & E[86] D & E D & E D & E D & E D & E
H.264 10-bit N/A N/A N/A N/A N/A N/A D & E D & E D & E D & E
VP8 D & E D & E D & E D & E D & E[87] D & E D & E D & E D & E D & E
H.265 N/A D & E 720P30 D & E D & E D & E D & E D & E D & E D & E D & E
H.265 10-bit N/A N/A N/A N/A D D D & E D & E D & E D & E
VP9 N/A N/A N/A N/A D D & E D & E D & E D & E D & E
VP9 10-bit N/A N/A N/A N/A D D D & E D & E D & E D & E
AV1 N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A
VVC N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A
FPS
Decoding

FPS

HD@120 HD@240 HD@480[80] HD@480[88] HD@960
FHD@60 FHD@120 FHD@240[80] FHD@240 ?
4K@30 4K@60 ? 4K@120
— 8K@? 8K@60
Encoding

FPS

HD@120 HD@240 HD@480[89] HD@480 HD@960
FHD@60 FHD@120 FHD@240[89] FHD@240 ?
4K@30 4K@60[89] 4K@60 4K@120
— 8K@30
HDRformats
Display and

playback

— HDR HDR10,

HLG[90]

HDR10,HLG,

HDR10+,Dolby Vision

Video

recording

— HDR10,

HLG[90]

HDR10,HLG,

HDR10+

HDR10,HLG,

HDR10+,Dolby Vision

Photo

recording

— 10-bitHDRHEIF

Code sample

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This is a singleinstruction packetfrom the inner loop of aFFT:[8][18] 

{ R17:16 = MEMD(R0++M1)
MEMD(R6++M1) = R25:24
R20 = CMPY(R20, R8):<<1:rnd:sat
R11:10 = VADDH(R11:10, R13:12)
}:endloop0

This packet is claimed by Qualcomm to be equal to 29 classic RISC operations; it includes vector add (4x 16-bit), complex multiply operation and hardware loop support. All instructions of the packet are done in the same cycle.

See also

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References

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  1. ^Baseband exploitation in 2013: Hexagon challengesArchivedDecember 24, 2013, at theWayback Machine/Ralf-Philipp Weinmann Pacsec 20132013-11-14, Tokyo, Japan: "32-bit unified address space for code and data – Byte addressable; 32 General registers (32-bit) – also usable pairwise: 64-bit register pairs"
  2. ^"CSDL | IEEE Computer Society".www.computer.org.Retrieved2024-06-08.
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  4. ^ab"Hexagon DSP SDK Processor".Qualcomm Developer Network.Retrieved2021-01-14.
  5. ^Humrick, Matt."Qualcomm Details Snapdragon 835: Kryo 280 CPU, Adreno 540 GPU, X16 LTE".www.anandtech.com.Retrieved2021-01-14.
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  7. ^"Rob Landley's Blog Thing for 2012".Landley.net.Retrieved2012-10-19.
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  10. ^Iqbal, Faisal."Qualcomm Hexagon DSP".
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  12. ^Will Strauss,Forward Concepts. Wireless/DSP Market Bulletin: Qualcomm Leads in Global DSP Silicon ShipmentsArchivedMay 28, 2013, at theWayback Machine// Forward Concepts: "In calendar year 2011, Qualcomm shipped a reported 521 million MSM chip shipments and we estimate that an average of 2.3 of its DSP cores in each unit resulted in 1.2 billion DSPs shipped in silicon. This (calendar) year, we estimate that the company will ship an average of 2.4 DSP cores with each (more complex) MSM chip."
  13. ^[1];[2];Ceva grabs 90% of DSP IP market,2012
  14. ^Hexagon v2 Programmers Reference
  15. ^Lucian Codrescu (Qualcomm) (March–April 2014)."Hexagon DSP: An Architecture Optimized for Mobile Multimedia and Communications"(PDF).IEEE Micro 34.2. pp.34–43.
  16. ^Faster 128-EEA3 and 128-EIA3 Software,Roberto Avanzi and Billy Bob Brumley (Qualcomm Research), Cryptology ePrint Archive: Report 2013/428, 2 Jul 2013. Page 9.
  17. ^abcdefghLucian Codrescu (Qualcomm) (August 2013)."Qualcomm Hexagon DSP: An architecture optimized for mobile multimedia and communications"(PDF).Palo Alto, CA: Hot Chips 25.
  18. ^abcdQualcomm Extends Hexagon DSP: Hexagon v5 Adds Floating-Point Math, Dynamic Multithreading// Linley Gwennap, Microprocessor Report, August 2013
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  26. ^"3.2 merge window, part 1".lwn.net.Retrieved2012-10-19.
  27. ^Linux Kernel 3.2 Release Notes"1.4. New architecture: Hexagon"
  28. ^Richard Kuo,Hexagon MiniVM// linux.ports.hexagon, 25 Apr 2013
  29. ^Hexagon MiniVM// CodeAurora (Qualcomm)
  30. ^"LLVM 3.1 Release Notes".Llvm.org. 2012-05-15.Retrieved2012-10-19.
  31. ^"LLVM 8.0.0 Release Notes".Llvm.org. 2019-03-20.Retrieved2019-04-03.
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  33. ^abQualcomm Announces Its 2012 Superchip: 28nm Snapdragon S4,10/12/2011 by John Oram. Quote: "Hexagon DSPs have been in Snapdragon chips since 2006."
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  41. ^Qualcomm's QDSP6 v5: Benchmarking Results Confirm That Floating-Point Support Has Arrived// BDTI, June 12, 2013
  42. ^abQualcomm's QDSP6 v6: Imaging and Vision Enhancements Via Vector Extensions// BDTI, September 29, 2015
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