Wikipedia

ARM Neoverse

(Redirected fromARM Neoverse N2)

The ARM Neoverse is a group of 64-bit ARM processor cores licensed byArm Holdings.The cores are intended fordatacenter,edge computing,andhigh-performance computinguse. The group consists of ARM Neoverse V-Series, ARM Neoverse N-Series, and ARM Neoverse E-Series.[1][2]

Neoverse V-Series

edit

The Neoverse V-Series processors are intended forhigh-performance computing.

Neoverse V1

edit

Neoverse V1 (code namedZeus[3]) is derived from theCortex-X1[4]and implements the ARMv8.4-A instruction set and some part of ARMv8.6-A.[5]It was officially announced by Arm on September 22, 2020.[6]It is said to be initially realized with a 7 nm process fromTSMC.One of the changes from the X1 is that it supports SVE 2x256-bit.

According toThe Next Platform,theAWS Graviton3is based on the Neoverse V1.[7][8]

Neoverse V2

edit

Neoverse V2 (code namedDemeter) is derived from theARM Cortex-X3and implements the ARMv9.0-A instruction set. It was officially announced by Arm on September 14, 2022.[9][10]NVIDIA Grace,[11]AWS Graviton4[12]andGoogleAxion[13]are based on the Neoverse V2.

Notable changes from the Neoverse V1:[14]

  • BTB capacity: 12K entries
  • TAGE predictor: 8-table
  • micro-op cache: 1536 entries (reduced for efficiency)
  • Decode width: 6
  • Rename / Dispatch width: 8
  • ROB: 320 entry
  • Execution ports: 15
  • L2 cache: 1024-2048 KB per core
  • CMN-700 mesh interconnect
    • Up to 256 cores per die
    • Up to 512 MB SLC
    • Up to 4 TB/s bandwidth

Neoverse V3

edit

Neoverse V3 (code namedPoseidon) was teased by Arm alongside the V2 and E2 announcements.[15]It is targeted for systems includingDDR5,PCIe gen6,andCXL 3.0.The codenamePoseidonwas first used for the generation succeedingZeus,now V1, and targeted for 2021 on a 5nm node.[16]

Neoverse N-Series

edit

The Neoverse N-Series processors are intended for coredatacenterusage.

Neoverse N1

edit

On February 20, 2019, Arm announced the Neoverse N1microarchitecture(code namedAres) derived from theCortex-A76redesigned for infrastructure/server applications. The reference design supports up to 64 or 128 Neoverse N1 cores.[17][18]

Notable changes from the Cortex-A76:

  • CoherentI-cacheandD-cachewith 4-cycle LD-use
  • L2 cache: 512–1024 KB per core
  • Mesh interconnect instead of 1–4 cores per cluster

Neoverse N1 implements the ARMv8.2-A instruction set.

TheAmpere Altra(2-socket 80-core) andAWS Graviton2(64-core) CPU platforms are based on Neoverse N1 cores and were released in 2020.[19]

Neoverse N2

edit

The Neoverse N2 (code namedPerseus) is derived from theCortex-A710and implements the ARMv9.0-A instruction set.[19]It was officially announced by Arm on September 22, 2020.[6]On August 28, 2023, Arm announced the Neoverse CSS N2 (Genesis), a customizable CPU subsystem implementation by Arm to reduce the time to market for customers.[20][21][22][23]Microsoft Azure Cobalt 100 128 Core CPU uses Neoverse N2.[24]

Notable changes from the Neoverse N1:[25][26]

  • BTB capacity: 8K entries
  • micro-op cache: 1536 entries
  • Rename / Dispatch width: 5
  • ROB: 160+ entry
  • Pipeline depth: 10 cycles
  • Execution ports: 13
  • SVE2 support
  • CMN-700 mesh interconnect

Neoverse N-Next

edit

Neoverse N-Next, presumably N3, was teased by Arm alongside the V2 and E2 announcements.[15]It is targeted for systems includingDDR5,PCIe gen6,andCXL 3.0.

Neoverse E-Series

edit

The Neoverse E-Series processors are intended foredge computing.They are designed for increased data throughput at decreased power consumption.

Neoverse E1

edit

Neoverse E1 is derived from the Cortex-A65AE[27]and implements the ARMv8.2-A instruction set. It supportSMT.

Neoverse E2

edit

Neoverse E2 is derived from the Cortex-A510[15]and implements the ARMv9-A instruction set.

Neoverse E-Next

edit

Neoverse E-Next, presumably E3, was teased by Arm alongside the V2 and E2 announcements.[15]It is targeted for systems includingDDR5,PCIe gen6,andCXL 3.0.

Matrix multiplication theoretical performance

edit
ops/cycle per core
INT8 BF16 FP32 FP64
Neoverse N1[28] 64 32 16 8
Neoverse N2[28] 128 64 16 8
Neoverse V1[28] 256 128 32 16
Intel 3rd Gen Xeon SP[29] 256 — 64 32
Intel 4th Gen Xeon SP[29] 2048 1024 64 32

Successors

edit

With code name Poseidon a successor for Neoverse V1 (aka Zeus)[30]was first publicly mentioned on TechCon 2018. Actual introduction (used by third party chip designers in their products) was given in form of a rough target date of 2021. Its initial realization process is said to be5 nmby TSMC.

References

edit
  1. ^"Arm Neoverse".
  2. ^"Arm Puts Some Muscle Into Future Neoverse Server CPU Designs".27 April 2021.
  3. ^"Neoverse V1 - Microarchitectures - ARM - WikiChip".
  4. ^"Arm Announces Neoverse V1, N2 Platforms & CPUs, CMN-700 Mesh: More Performance, More Cores, More Flexibility".
  5. ^"Neoverse V1".Retrieved2023-04-16.
  6. ^ab"Accelerating the next generation cloud-to-edge infrastructure".Retrieved2023-04-16.
  7. ^"Inside Amazon's Graviton3 Arm Server Processor".4 January 2022.
  8. ^"Graviton 3: First Impressions".Chips and Cheese.2022-05-29.Retrieved2023-09-16.
  9. ^"Redefining the global computing infrastructure with next-generation Arm Neoverse platforms".
  10. ^"Neoverse V2".developer.arm.Retrieved2023-09-16.
  11. ^"NVIDIA Grace CPU and Arm Architecture".NVIDIA.Retrieved2023-04-16.
  12. ^"Join the preview for new memory-optimized, AWS Graviton4-powered Amazon EC2 instances (R8g)".AWS.Retrieved23 December2023.
  13. ^"Introducing Google's new Arm-based CPU".Google Cloud Blog.Retrieved2024-04-10.
  14. ^"Hot Chips 2023: Arm's Neoverse V2".Chips and Cheese.2023-09-11.Retrieved2023-09-16.
  15. ^abcd"Arm Announces Neoverse V2 and E2: The Next Generation of Arm Server CPU Cores".
  16. ^Kennedy, Patrick (2018-10-16)."Arm Neoverse Brand Launched for Infrastructure Servers to Edge".ServeTheHome.Retrieved2024-02-02.
  17. ^Frumusanu, Andrei."Arm Announces Neoverse N1 & E1 Platforms & CPUs: Enabling A Huge Jump In Infrastructure Performance".anandtech.Retrieved2020-06-17.
  18. ^"Arm Launches New Neoverse N1 and E1 Server Cores".WikiChip Fuse.2019-02-20.Retrieved2020-06-17.
  19. ^abFrumusanu, Andrei."Arm Announces Neoverse V1, N2 Platforms & CPUs, CMN-700 Mesh: More Performance, More Cores, More Flexibility".anandtech.Retrieved2022-05-05.
  20. ^"Neoverse CSS Fastest Path to Production Silicon - Infrastructure Solutions blog - Arm Community blogs - Arm Community".community.arm.2023-08-28.Retrieved2023-09-16.
  21. ^Ltd, Arm."Neoverse Compute Subsystems".Arm | The Architecture for the Digital World.Retrieved2023-09-16.
  22. ^"Arm at HC35 (2023): CSS-Genesis".Chips and Cheese.2023-09-13.Retrieved2023-09-16.
  23. ^Morgan, Timothy Prickett (2023-08-31)."Arm Gets Closer To Creating Full-Blown Server CPU Designs - The Next Platform".nextplatform.Retrieved2023-09-16.
  24. ^Lee, John (16 November 2023)."Microsoft Azure Cobalt 100 128 Core Arm Neoverse N2 CPU Launched".ServeTheHome.Archivedfrom the original on 19 March 2024.
  25. ^"ARM's Neoverse N2: Cortex A710 for Servers".Chips and Cheese.2023-08-18.Retrieved2023-09-16.
  26. ^Frumusanu, Andrei."Arm Announces Neoverse V1, N2 Platforms & CPUs, CMN-700 Mesh: More Performance, More Cores, More Flexibility".anandtech.Retrieved2023-09-16.
  27. ^"Arm Announces Neoverse N1 & E1 Platforms & CPUs: Enabling a Huge Jump in Infrastructure Performance".
  28. ^abc"Arm Announces Neoverse V1, N2 Platforms & CPUs, CMN-700 Mesh: More Performance, More Cores, More Flexibility".Retrieved2023-04-16.
  29. ^ab"Accelerate Artificial Intelligence (AI) Workloads with Intel Advanced Matrix Extensions (Intel AMX)"(PDF).Intel.Retrieved2023-04-13.
  30. ^"Poseidon - Microarchitectures - ARM - WikiChip".
Retrieved from "https://en.wikipedia.org/w/index.php?title=ARM_Neoverse&oldid=1249681872#Neoverse_N2"