MIL-STD-1750A

MIL-STD-1750Aor1750Ais the formal definition of a 16-bit computerinstruction setarchitecture (ISA), including both required and optional components, as described by themilitary standarddocument MIL-STD-1750A (1980). Since August 1996, it has been inactive for new designs.

1750A

Bits	16-bit
Introduced	1980
Design	CMOS, GaAs, ECL, SoS
Type	CISC
Encoding	16-bit instructions
Extensions	FPU, MMU
Registers
General-purpose	16 × 16-bit
Floating point	Optional in specification

In addition to the core ISA, the definition defines optional instructions, such as aFPUandMMU.Importantly, the standard does not define the implementation details of a 1750A processor.

Internals

Bound copy, from the 1980s, of the MIL-STD-1750A specification document

The 1750A supports 2¹⁶16-bit words of memory for the core standard. The standard defines an optionalmemory management unitthat allows 2²⁰16-bit words of memory using 512 page mapping registers (in the I/O space), defining separate instruction and data spaces, and keyed memory access control.

Most instructions are 16 bits, although some have a 16-bit extension. The standard computer has 16 general purpose 16-bit registers (0 through 15). Registers 1 through 15 can be used asindex registers.Registers 12 through 15 can be used as base registers.

Any of the 16 registers can be used as astackpointerfor the SJS and URS instructions (stack jump subroutineandunstack return subroutine), but only register 15 is used as the stack pointer for the PSHM and POPM instructions (push multipleandpop multiple).

The computer has instructions for 16- and 32-bit binary arithmetic, as well as 32- and 48-bitfloating point.I/O is generally via the I/O instructions (XIO and VIO), which have a separate 2¹⁶16-bit word address space and may have a specialized bus.

Implementations

Performance Semiconductor P1750AE

Because MIL-STD-1750A does not define implementation details, 1750A products are available from a wide variety of companies in the form of component, board, and system-level offerings implemented in myriad technologies, often the most advanced and exotic of their respective periods (e.g.GaAs,ECL,SoS).

1750A systems often offer high levels of protection from radiation and other hazardous environments, making them particularly suited for military, aviation and space applications.

Examples of MIL-STD-1750A implementations include:

• CPU Technology, Inc.CPU1750A-FB, a high performance 1750ASOCdesigned to give existing applications a late life performance boost.
• Delco Systems OperationsMagic V 1750 Processor
• Dynex SemiconductorMAS281. Aradiation hardenedSOCimplementation on a 64-pin multichip module with an optional MMU.
• GEC-PlesseyRH1750, a radiation-hardened version for aerospace and space flight applications. GEC-Plessey, under its previous iteration asMarconiElectronic Devices, also initially developed the MAS281 and MA31750Aseries of processors, later made available throughDynex Semiconductor
• HoneywellHX1750, fabricated on Honeywell's Silicon on Insulator CMOS (SOI-IV) process giving radiation hardness. The HX1750 includes an FPU and peripherals on chip.
• Johns Hopkins UniversityApplied Physics Laboratory(JHU/APL) MIL-STD-1750AAV space flight qualified processor. A multi-boardsilicon on sapphireimplementation specifically designed for space flight.
• MarconiElectronic Devices MIL-STD-1750A.
• McDonnell-Douglas MD-281. A radiation hardened SoS three-die implementation on a 64-pin multichip module.
• Fairchild Semiconductor F9450series.
• National Semiconductor PACEP1750A. The PACE normally runs a version of theData General Novainstruction set, but was adapted to run MIL-STD-1750A using newmicrocode.The family includes the P1750A CPU, the P1750AE Enhanced CPU, the P1753Memory Management Unit(MMU), the P1754 Processor Interface Chip (PIC) and the P1757ME Multi-Chip Module. This line was passed toPerformance Semiconductorand then Pyramid Semiconductor in 2003.
• Royal Aircraft Establishment FarnboroughMIL-STD-1750A implementation inAMD2901bit-slicetechnology.

Programming

Software vendor from the 1980s offering cross-compilers from three language languages to the 1750A

Processors based on MIL-STD-1750A are often programmed inJOVIAL,a high-levelprogramming languagedefined by theUnited States Department of Defensewhich is derived fromALGOL 58.Later,Adawas heavily used.

There are alsoCcompilers, for example Cleanscape XTC-1750A. Older versions ofGNUGCCcontain support for MIL-STD-1750A; it was declared obsolete in version 3.1, and removed in subsequent versions.

In addition, DDC-I provides its SCORE Integrated Development Environment (IDE) with both Ada95 and C compilers, and TADS (Tartan Ada Development System) Ada83 development environment, both targeting processors based on MIL-STD-1750A.

Deployments

TheU.S. Air Forcedefined the standard in order to have a common computing architecture and thereby reduce the costs of software and computer systems for allmilitary computingneeds. This includes embedded tasks such as aircraft and missile control systems as well as more mundane general military computing needs.

The advantages of this concept are recognized outside of the USAF, and the 1750A has been adopted by other organizations such as theEuropean Space Agency,NASA,Israeli Aircraft Industries,and many projects in academia.

Examples of military aircraft using the 1750A include:

• IAI Lavifighter
• IBM Federal SystemsAP-102, a member of theSystem/4_Pi Advanced_Processorseries (used in various roles including the USAFF-111avionics upgrade)
• US ArmyAH-64DApache Longbow Helicopter
• USAFF-16Digital Flight Control System and Fire Control Computer
• USNF-18RFCS Flight Control Computer

Use in space

Fully space-rated implementations make the 1750A one of the few types of computers that are applicable for use in deep space applications. Example spacecraft that use the 1750A are:

• EOSAqua,AuraandTerra
• ESACluster
• ESAEnvisat- Envisat's ASAR instrument, built byMatra Marconi Spaceand comprising the Central Electronics Sub-Assembly and Antenna Sub-Assembly used a total of 42 GEC-Plessey MA31750A processors in a dual-redundant configuration
• ESARosetta
• ESAMars Express
• ESAVenus Express
• EUMETSATMetop
• ISRO GSAT/INSAT/IRS series of spacecraft
• ISRO Mars Orbiter Mission
• ISRO Space Recovery Experiment-1 Guidance and Navigation Computer
• Midcourse Space Experiment (MSX) spacecraft developed at JHU/APL
• MSTI-1, 2 and 3
• NASACassini
• NASA Landsat 7
• NASAMars Global Surveyor
• Naval Research LaboratoryClementineLunar Orbiter
• NOAAGOES-13, GOES-O and GOES-P
• Orbital Sciences Corporationcommercial communication satellite platforms
• USAF Titan-4Guidance Computer

1750B

The MIL-STD-1750B was to be a successor architecture to the MIL-STD-1750A, with added and expanded features, some of which were optional. By the mid-1980s there was a published draft of the 1750B available,and some vendors began implementations for it. However, no finalized specification was ever issued for the 1750B, as military and industry attention shifted to 32-bit architectural alternatives such as theMIPS R3000.

External links

• DOD MIL-STD-1750 standard
• DOD MIL-STD-1750 standard(PDF), with updated Notice 1, 21 May 1982
• DOD MIL-STD-1750 standard(HTML), with updated Notice 1, 21 May 1982
• Software Vendor Information
• Specification and vendor information
• Ada83 compiler for the 1750A processor
• IDE, Ada95, EC++ and ANSI C compilers for the 1750A processor
• Ada and ANSI C compilers
• FlightLinux Project Target Architecture Technical ReportReferences to use in spacecraft
• Dynex Semiconductor MA31750 Processor
• Pyramid Semiconductor P1750A-SOS Processor