Bluespec

Bluespec
Paradigm	Functional
Family	Verilog,Haskell
Developer	Bluespec Inc.
Stable release	Version 2022.01 / January 2022
Scope	HDL
Filename extensions	.bsv
Website	bluespec.com
Majorimplementations
	Bluespec Compiler (BSC); Toy Bluespec Compiler
Dialects
	SystemVerilog(BSV), Haskell (BH:Bluespec Classic)

Bluespec, Inc.is an Americansemiconductor device electronic design automationcompany based inFramingham, Massachusetts,and co-founded in June 2003 bycomputer scientists ArvindMithal, professor of theMassachusetts Institute of Technology(MIT), andJoe StoyofOxford University.Arvind had formerly founded Sandburst in 2000, which specialized in producing chips for10 Gigabit Ethernet(10GE)routers,for this task.^[1]^[2]

Bluespec has two product lines which are primarily forapplication-specific integrated circuit(ASIC) andfield-programmable gate array(FPGA) hardware designers and architects. Bluespec supplieshigh-level synthesis(electronic system-level(ESL)logic synthesis) withregister-transfer level(RTL). The first Bluespec workshop was held on August 13, 2007, at MIT.^[3]

Bluespec SystemVerilog

Arvind had developed the Bluespec language namedBluespecSystemVerilog(BSV), a high-levelfunctional programming hardware description programming languagewhich was essentiallyHaskellextended to handle chip design andelectronic design automationin general.^[5]The main designer and implementor of Bluespec wasLennart Augustsson.Bluespec ispartially evaluated(to convert the Haskell parts) and compiled to theterm rewriting system(TRS). It comes with aSystemVerilogfrontend.^[6]BSV is compiled to theVerilog RTL designfiles.

BSV releases are shipped with the following hardware development kit:^[7]^: 7

BSV compiler: The compiler takes BSV source code as input and generates a hardware description for either Verilog or Bluesim as output. It was opensourced by Bluespec inc. in 2020 underNew BSD Licenseterms.
Libraries: BSV is shipped with a set programming idioms and hardware structures
Verilogmodules: Several primitive BSV elements, such asfirst in, first out(FIFOs) andprocessor registers,are expressed as Verilog primitives.
Bluesim: A cycle simulator for BSV designs.
Bluetcl: A collection ofTclextensions, scripts, and packages to link into a Bluespec design.

^"Arvind elected as India National Academy of Sciences Foreign Fellow".MIT News.2014-12-23.
^Maffei, Lucia (2023-02-09)."Form D Friday: Lexington blood tech startup raises $13.2M".American City Business Journals.
^"The First Bluespec Workshop".csg.csail.mit.edu.Retrieved2019-05-04.
^Bluespec Compiler: README.md,B-Lang, 2022-11-04,retrieved2022-11-15
^"[it] is basically Haskell with some extra syntactic constructs for theterm rewriting system(TRS) that describes what the hardware does. The type system has been extended with types of numeric kind. "pg 43 of Hudak, Jones, et al. 2007
^Hudak, Jones, et al. 2007
^Bluespec SystemVerilog User Guide,Bluespec inc., November 24, 2008

Hudak, Paul (Yale University);Hughes, John (Chalmers University);Peyton Jones, Simon (Microsoft Research);Wadler, Philip Wadler (University of Edinburgh)(June 9–10, 2007). "A history of Haskell: being lazy with class".HOPL III: Proceedings of the third ACM SIGPLAN conference on History of programming languages.San Diego, California: Association for Computing Machinery. pp. 12-1–12-55.doi:10.1145/1238844.1238856.[it] is basically Haskell with some extra syntactic constructs for theterm rewriting system(TRS) that describes what the hardware does. The type system has been extended with types of numeric kind.
Peyton Jones, Simon(June 2007).A History of Haskell: being lazy with class.Microsoft Research(Report).

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