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Multi-core processor

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"Dual Core" redirects here. Not to be confused withDual Core (hip hop duo).
Diagram of a generic dual-core processor with CPU-local level-1 caches and a shared, on-die level-2 cache
An IntelCore 2 DuoE6750 dual-core processor
An AMDAthlon X2 6400+dual-core processor

Amulti-core processor(MCP) is amicroprocessoron a singleintegrated circuit(IC) with two or more separatecentral processing units(CPUs), calledcoresto emphasize their multiplicity (for example,dual-coreorquad-core). Each core reads and executesprogram instructions,[1]specifically ordinaryCPU instructions(such as add, move data, and branch). However, the MCP can run instructions on separate cores at the same time, increasing overall speed for programs that supportmultithreadingor otherparallel computingtechniques.[2]Manufacturers typically integrate the cores onto a single ICdie,known as achip multiprocessor(CMP), or onto multiple dies in a singlechip package.As of 2024, the microprocessors used in almost all newpersonal computersare multi-core.

A multi-core processor implementsmultiprocessingin a single physical package. Designers may couple cores in a multi-core device tightly or loosely. For example, cores may or may not sharecaches,and they may implementmessage passingorshared-memoryinter-core communication methods. Commonnetwork topologiesused to interconnect cores includebus,ring,two-dimensionalmesh,andcrossbar.Homogeneous multi-core systems include only identical cores;heterogeneousmulti-core systems have cores that are not identical (e.g.big.LITTLEhave heterogeneous cores that share the sameinstruction set,whileAMD Accelerated Processing Unitshave cores that do not share the same instruction set). Just as with single-processor systems, cores in multi-core systems may implement architectures such asVLIW,superscalar,vector,ormultithreading.

Multi-core processors are widely used across many application domains, includinggeneral-purpose,embedded,network,digital signal processing(DSP), andgraphics(GPU). Core count goes up to even dozens, and for specialized chips over 10,000,[3]and insupercomputers(i.e. clusters of chips) the count can go over 10 million (and inone caseup to 20 million processing elements total in addition to host processors).[4]

The improvement in performance gained by the use of a multi-core processor depends very much on thesoftwarealgorithms used and their implementation. In particular, possible gains are limited by the fraction of the software that canrun in parallelsimultaneously on multiple cores; this effect is described byAmdahl's law.In the best case, so-calledembarrassingly parallelproblems may realize speedup factors near the number of cores, or even more if the problem is split up enough to fit within each core's cache(s), avoiding use of much slower main-system memory. Most applications, however, are not accelerated as much unless programmers invest effort inrefactoring.[5]

The parallelization of software is a significant ongoing topic of research. Cointegration of multiprocessor applications provides flexibility in network architecture design. Adaptability within parallel models is an additional feature of systems utilizing these protocols.[6]

In the consumer market, dual-core processors (that is, microprocessors with two units) started becoming commonplace on personal computers in the late 2000s.[7]Quad-core processors were also being adopted in that era for higher-end systems before becoming standard. In the late 2010s, hexa-core (six cores) started entering the mainstream[8]and since the early 2020s has overtaken quad-core in many spaces.[9]

Terminology

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The termsmulti-coreanddual-coremost commonly refer to some sort ofcentral processing unit(CPU), but are sometimes also applied todigital signal processors(DSP) andsystem on a chip(SoC). The terms are generally used only to refer to multi-core microprocessors that are manufactured on thesameintegrated circuitdie;separate microprocessor dies in the same package are generally referred to by another name, such asmulti-chip module.This article uses the terms "multi-core" and "dual-core" for CPUs manufactured on thesameintegrated circuit, unless otherwise noted.

In contrast to multi-core systems, the termmulti-CPUrefers to multiple physically separate processing-units (which often contain special circuitry to facilitate communication between each other).

The termsmany-coreandmassively multi-coreare sometimes used to describe multi-core architectures with an especially high number of cores (tens to thousands[10]).[11]

Some systems use manysoft microprocessorcores placed on a singleFPGA.Each "core" can be considered a "semiconductor intellectual property core"as well as a CPU core.[citation needed]

Development

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While manufacturing technology improves, reducing the size of individual gates, physical limits ofsemiconductor-basedmicroelectronicshave become a major design concern. These physical limitations can cause significant heat dissipation and data synchronization problems. Various other methods are used to improve CPU performance. Someinstruction-level parallelism(ILP) methods such assuperscalarpipeliningare suitable for many applications, but are inefficient for others that contain difficult-to-predict code. Many applications are better suited tothread-level parallelism(TLP) methods, and multiple independent CPUs are commonly used to increase a system's overall TLP. A combination of increased available space (due to refined manufacturing processes) and the demand for increased TLP led to the development of multi-core CPUs.

Commercial incentives

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Several business motives drive the development of multi-core architectures. For decades, it was possible to improve performance of a CPU by shrinking the area of the integrated circuit (IC), which reduced the cost per device on the IC. Alternatively, for the same circuit area, more transistors could be used in the design, which increased functionality, especially forcomplex instruction set computing(CISC) architectures.Clock ratesalso increased by orders of magnitude in the decades of the late 20th century, from several megahertz in the 1980s to several gigahertz in the early 2000s.

As the rate of clock speed improvements slowed, increased use of parallel computing in the form of multi-core processors has been pursued to improve overall processing performance. Multiple cores were used on the same CPU chip, which could then lead to better sales of CPU chips with two or more cores. For example,Intelhas produced a 48-core processor for research in cloud computing; each core has anx86architecture.[12][13]

Technical factors

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Since computer manufacturers have long implementedsymmetric multiprocessing(SMP) designs using discrete CPUs, the issues regarding implementing multi-core processor architecture and supporting it with software are well known.

Additionally:

  • Using a proven processing-core design without architectural changes reduces design risk significantly.
  • For general-purpose processors, much of the motivation for multi-core processors comes from greatly diminished gains in processor performance from increasing theoperating frequency.This is due to three primary factors:[14]
    1. Thememory wall;the increasing gap between processor and memory speeds. This, in effect, pushes for cache sizes to be larger in order to mask the latency of memory. This helps only to the extent that memory bandwidth is not the bottleneck in performance.
    2. TheILP wall;the increasing difficulty of finding enoughparallelism in a single instruction streamto keep a high-performance single-core processor busy.
    3. Thepower wall;the trend of consuming exponentially increasing power (and thus also generating exponentially increasing heat) with each factorial increase of operating frequency. This increase can be mitigated by "shrinking"the processor by using smaller traces for the same logic. Thepower wallposes manufacturing, system design and deployment problems that have not been justified in the face of the diminished gains in performance due to thememory wallandILP wall.[citation needed]

In order to continue delivering regular performance improvements for general-purpose processors, manufacturers such asIntelandAMDhave turned to multi-core designs, sacrificing lower manufacturing-costs for higher performance in some applications and systems. Multi-core architectures are being developed, but so are the alternatives. An especially strong contender for established markets is the further integration of peripheral functions into the chip.

Advantages

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The proximity of multiple CPU cores on the same die allows thecache coherencycircuitry to operate at a much higher clock rate than what is possible if the signals have to travel off-chip. Combining equivalent CPUs on a single die significantly improves the performance ofcache snoop(alternative:Bus snooping) operations. Put simply, this means thatsignalsbetween different CPUs travel shorter distances, and therefore those signalsdegradeless. These higher-quality signals allow more data to be sent in a given time period, since individual signals can be shorter and do not need to be repeated as often.

Assuming that the die can physically fit into the package, multi-core CPU designs require much lessprinted circuit board(PCB) space than do multi-chipSMPdesigns. Also, a dual-core processor uses slightly less power than two coupled single-core processors, principally because of the decreased power required to drive signals external to the chip. Furthermore, the cores share some circuitry, like the L2 cache and the interface to thefront-side bus(FSB). In terms of competing technologies for the available silicon die area, multi-core design can make use of proven CPU core library designs and produce a product with lower risk of design error than devising a new wider-core design. Also, adding more cache suffers from diminishing returns.

Multi-core chips also allow higher performance at lower energy. This can be a big factor in mobile devices that operate on batteries. Since each core in a multi-core CPU is generally more energy-efficient, the chip becomes more efficient than having a single large monolithic core. This allows higher performance with less energy. A challenge in this, however, is the additional overhead of writing parallel code.[15]

Disadvantages

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Maximizing the usage of the computing resources provided by multi-core processors requires adjustments both to theoperating system(OS) support and to existing application software. Also, the ability of multi-core processors to increase application performance depends on the use of multiple threads within applications.

Integration of a multi-core chip can lower the chip production yields. They are also more difficult to manage thermally than lower-density single-core designs. Intel has partially countered this first problem by creating its quad-core designs by combining two dual-core ones on a single die with a unified cache, hence any two working dual-core dies can be used, as opposed to producing four cores on a single die and requiring all four to work to produce a quad-core CPU. From an architectural point of view, ultimately, single CPU designs may make better use of the silicon surface area than multiprocessing cores, so a development commitment to this architecture may carry the risk of obsolescence. Finally, raw processing power is not the only constraint on system performance. Two processing cores sharing the same system bus and memory bandwidth limits the real-world performance advantage.

Hardware

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The trend in processor development has been towards an ever-increasing number of cores, as processors with hundreds or even thousands of cores become theoretically possible.[16]In addition, multi-core chips mixed withsimultaneous multithreading,memory-on-chip, and special-purpose"heterogeneous"(or asymmetric) cores promise further performance and efficiency gains, especially in processing multimedia, recognition and networking applications. For example, abig.LITTLEcore includes a high-performance core (called 'big') and a low-power core (called 'LITTLE'). There is also a trend towards improving energy-efficiency by focusing on performance-per-watt with advanced fine-grain or ultra fine-grainpower managementand dynamicvoltageandfrequency scaling(i.e.laptopcomputers andportable media players).

Chips designed from the outset for a large number of cores (rather than having evolved from single core designs) are sometimes referred to asmanycoredesigns, emphasising qualitative differences.

Architecture

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The composition and balance of the cores in multi-core architecture show great variety. Some architectures use one core design repeated consistently ( "homogeneous" ), while others use a mixture of different cores, each optimized for a different, "heterogeneous"role.

How multiple cores are implemented and integrated significantly affects both the developer's programming skills and the consumer's expectations of apps and interactivity versus the device.[17]A device advertised as being octa-core will only have independent cores if advertised asTrue Octa-core,or similar styling, as opposed to being merely two sets of quad-cores each with fixed clock speeds.[18][19]

The article "CPU designers debate multi-core future" by Rick Merritt, EE Times 2008,[20]includes these comments:

Chuck Moore [...] suggested computers should be like cellphones, using a variety of specialty cores to run modular software scheduled by a high-level applications programming interface.

[...] Atsushi Hasegawa, a senior chief engineer atRenesas,generally agreed. He suggested the cellphone's use of many specialty cores working in concert is a good model for future multi-core designs.

[...]Anant Agarwal,founder and chief executive of startupTilera,took the opposing view. He said multi-core chips need to be homogeneous collections of general-purpose cores to keep the software model simple.

Software effects

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An outdated version of an anti-virus application may create a new thread for a scan process, while itsGUIthread waits for commands from the user (e.g. cancel the scan). In such cases, a multi-core architecture is of little benefit for the application itself due to the single thread doing all the heavy lifting and the inability to balance the work evenly across multiple cores. Programming truly multithreaded code often requires complex co-ordination of threads and can easily introduce subtle and difficult-to-find bugs due to the interweaving of processing on data shared between threads (seethread-safety). Consequently, such code is much more difficult to debug than single-threaded code when it breaks. There has been a perceived lack of motivation for writing consumer-level threaded applications because of the relative rarity of consumer-level demand for maximum use of computer hardware. Also, serial tasks like decoding theentropy encodingalgorithms used invideo codecsare impossible to parallelize because each result generated is used to help create the next result of the entropy decoding algorithm.

Given the increasing emphasis on multi-core chip design, stemming from the grave thermal and power consumption problems posed by any further significant increase in processor clock speeds, the extent to which software can be multithreaded to take advantage of these new chips is likely to be the single greatest constraint on computer performance in the future. If developers are unable to design software to fully exploit the resources provided by multiple cores, then they will ultimately reach an insurmountable performance ceiling.

The telecommunications market had been one of the first that needed a new design of parallel datapath packet processing because there was a very quick adoption of these multiple-core processors for the datapath and the control plane. These MPUs are going to replace[21]the traditional Network Processors that were based on proprietarymicrocodeorpicocode.

Parallel programmingtechniques can benefit from multiple cores directly. Some existingparallel programming modelssuch asCilk Plus,OpenMP,OpenHMPP,FastFlow,Skandium,MPI,andErlangcan be used on multi-core platforms. Intel introduced a new abstraction for C++ parallelism calledTBB.Other research efforts include theCodeplay Sieve System,Cray'sChapel,Sun'sFortress,and IBM'sX10.

Multi-core processing has also affected the ability of modern computational software development. Developers programming in newer languages might find that their modern languages do not support multi-core functionality. This then requires the use ofnumerical librariesto access code written in languages likeCandFortran,which perform math computations faster[citation needed]than newer languages likeC#.Intel's MKL and AMD'sACMLare written in these native languages and take advantage of multi-core processing. Balancing the application workload across processors can be problematic, especially if they have different performance characteristics. There are different conceptual models to deal with the problem, for example using a coordination language and program building blocks (programming libraries or higher-order functions). Each block can have a different native implementation for each processor type. Users simply program using these abstractions and an intelligent compiler chooses the best implementation based on the context.[22]

Managingconcurrencyacquires a central role in developing parallel applications. The basic steps in designing parallel applications are:

Partitioning
The partitioning stage of a design is intended to expose opportunities for parallel execution. Hence, the focus is on defining a large number of small tasks in order to yield what is termed a fine-grained decomposition of a problem.
Communication
The tasks generated by a partition are intended to execute concurrently but cannot, in general, execute independently. The computation to be performed in one task will typically require data associated with another task. Data must then be transferred between tasks so as to allow computation to proceed. This information flow is specified in the communication phase of a design.
Agglomeration
In the third stage, development moves from the abstract toward the concrete. Developers revisit decisions made in the partitioning and communication phases with a view to obtaining an algorithm that will execute efficiently on some class of parallel computer. In particular, developers consider whether it is useful to combine, or agglomerate, tasks identified by the partitioning phase, so as to provide a smaller number of tasks, each of greater size. They also determine whether it is worthwhile to replicate data and computation.
Mapping
In the fourth and final stage of the design of parallel algorithms, the developers specify where each task is to execute. This mapping problem does not arise on uniprocessors or on shared-memory computers that provide automatic task scheduling.

On the other hand, on theserver side,multi-core processors are ideal because they allow many users to connect to a site simultaneously and have independentthreadsof execution. This allows for Web servers and application servers that have much betterthroughput.

Licensing

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Vendors may license some software "per processor". This can give rise to ambiguity, because a "processor" may consist either of a single core or of a combination of cores.

Embedded applications

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Anembedded systemon a plug-in card with processor, memory, power supply, and external interfaces

Embedded computingoperates in an area of processor technology distinct from that of "mainstream" PCs. The same technological drives towards multi-core apply here too. Indeed, in many cases the application is a "natural" fit for multi-core technologies, if the task can easily be partitioned between the different processors.

In addition, embedded software is typically developed for a specific hardware release, making issues ofsoftware portability,legacy code or supporting independent developers less critical than is the case for PC or enterprise computing. As a result, it is easier for developers to adopt new technologies and as a result there is a greater variety of multi-core processing architectures and suppliers.

Network processors

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As of 2010,multi-corenetwork processorshave become mainstream, with companies such asFreescale Semiconductor,Cavium Networks,WintegraandBroadcomall manufacturing products with eight processors. For the system developer, a key challenge is how to exploit all the cores in these devices to achieve maximum networking performance at the system level, despite the performance limitations inherent in asymmetric multiprocessing(SMP) operating system. Companies such as6WINDprovide portable packet processing software designed so that the networking data plane runs in a fast path environment outside the operating system of the network device.[25]

Digital signal processing

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Indigital signal processingthe same trend applies:Texas Instrumentshas the three-core TMS320C6488 and four-core TMS320C5441,Freescalethe four-core MSC8144 and six-core MSC8156 (and both have stated they are working on eight-core successors). Newer entries include the Storm-1 family fromStream Processors, Incwith 40 and 80 general purpose ALUs per chip, all programmable in C as a SIMD engine andPicochipwith 300 processors on a single die, focused on communication applications.

Heterogeneous systems

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Inheterogeneous computing,where a system uses more than one kind of processor or cores, multi-core solutions are becoming more common:XilinxZynq UltraScale+ MPSoC has a quad-core ARM Cortex-A53 and dual-core ARM Cortex-R5. Software solutions such as OpenAMP are being used to help with inter-processor communication.

Mobile devices may use theARM big.LITTLEarchitecture.

Hardware examples

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Commercial

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Free

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Academic

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Benchmarks

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The research and development of multicore processors often compares many options, and benchmarks are developed to help such evaluations. Existing benchmarks include SPLASH-2, PARSEC, and COSMIC for heterogeneous systems.[49]

See also

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Notes

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  1. ^Digital signal processors(DSPs) have used multi-core architectures for much longer than high-end general-purpose processors. A typical example of a DSP-specific implementation would be a combination of aRISCCPU and a DSPMPU.This allows for the design of products that require a general-purpose processor for user interfaces and a DSP for real-time data processing; this type of design is common inmobile phones.In other applications, a growing number of companies have developed multi-core DSPs with very large numbers of processors.
  2. ^Two types ofoperating systemsare able to use a dual-CPU multiprocessor: partitioned multiprocessing andsymmetric multiprocessing(SMP). In a partitioned architecture, each CPU boots into separate segments of physical memory and operate independently; in an SMP OS, processors work in a shared space, executing threads within the OS independently.

References

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  1. ^Rouse, Margaret (March 27, 2007)."Definition: multi-core processor".TechTarget. Archived fromthe originalon August 5, 2010.RetrievedMarch 6,2013.
  2. ^Schauer, Bryan."Multicore Processors – A Necessity"(PDF).Archived fromthe original(PDF)on 2011-11-25.
  3. ^abSmith, Ryan."NVIDIA Announces the GeForce RTX 30 Series: Ampere For Gaming, Starting With RTX 3080 & RTX 3090".www.anandtech.com.Retrieved2020-09-15.
  4. ^"Sunway TaihuLight - Sunway MPP, Sunway SW26010 260C 1.45GHz, Sunway | TOP500".www.top500.org.Retrieved2020-09-15.
  5. ^ Suleman, Aater (May 20, 2011)."What makes parallel programming hard?".FutureChips. Archived fromthe originalon May 29, 2011.RetrievedMarch 6,2013.
  6. ^Duran, A (2011). "Ompss: a proposal for programming heterogeneous multi-core architectures".Parallel Processing Letters.21(2): 173–193.doi:10.1142/S0129626411000151.
  7. ^"Definition of dual core".PCMAG.Retrieved2023-10-27.
  8. ^"Intel taking its six-core processors mainstream in 2018 with Coffee Lake family".ZDNET.Retrieved2023-10-27.
  9. ^Alan Dexter (2022-04-05)."Six-core CPUs are now more popular than quad-core chips on Steam".PC Gamer.Retrieved2024-05-22.
  10. ^Schor, David (November 2017)."The 2,048-core PEZY-SC2 sets a Green500 record".WikiChip.
  11. ^Vajda, András (2011-06-10).Programming Many-Core Chips.Springer. p. 3.ISBN978-1-4419-9739-5.
  12. ^Shrout, Ryan (December 2, 2009)."Intel Shows 48-core x86 Processor as Single-chip Cloud Computer".Archivedfrom the original on January 5, 2016.RetrievedMay 17,2015.
  13. ^"Intel unveils 48-core cloud computing silicon chip".BBC. December 3, 2009.Archivedfrom the original on December 6, 2012.RetrievedMarch 6,2013.
  14. ^Patterson, David A. "Future of computer architecture." Berkeley EECS Annual Research Symposium (BEARS), College of Engineering, UC Berkeley, US. 2006.
  15. ^Suleman, Aater (May 19, 2011)."Q & A: Do multicores save energy? Not really".Archived fromthe originalon December 16, 2012.RetrievedMarch 6,2013.
  16. ^Clark, Jack."Intel: Why a 1,000-core chip is feasible".ZDNet.Archivedfrom the original on 6 August 2015.Retrieved6 August2015.
  17. ^Kudikala, Chakri (Aug 27, 2016)."These 5 Myths About the Octa-Core Phones Are Actually True".Giz Bot.
  18. ^"MediaTek Launches MT6592 True Octa-Core Mobile Platform"(Press release). MediaTek. November 20, 2013. Archived fromthe originalon October 29, 2020.
  19. ^"What is an Octa-core processor".Samsung. Archived fromthe originalon January 17, 2022.Galaxy smartphones run on either Octa-core (2.3GHz Quad + 1.6GHz Quad) or Quad-core (2.15GHz + 1.6GHz Dual) processors
  20. ^Merritt, Rick (February 6, 2008)."CPU designers debate multi-core future".EE Times.RetrievedOctober 21,2023.
  21. ^"Multicore Packet Processing Forum".Archived fromthe originalon 2009-12-21.
  22. ^ John Darlinton; Moustafa Ghanem; Yike Guo; Hing Wing To (1996). "Guided Resource Organisation in Heterogeneous Parallel Computing".Journal of High Performance Computing.4(1): 13–23.CiteSeerX10.1.1.37.4309.
  23. ^Bright, Peter (4 December 2015)."Windows Server 2016 moving to per core, not per socket, licensing".Ars Technica.Condé Nast.Archivedfrom the original on 4 December 2015.Retrieved5 December2015.
  24. ^ Compare: "The Licensing Of Oracle Technology Products".OMT-CO Operations Management Technology Consulting GmbH.Archivedfrom the original on 2014-03-21.Retrieved2014-03-04.
  25. ^"6WINDGATE Software: Network Optimization Software – SDN Software – Control Plane Software | 6WIND".
  26. ^"Sempron™ 3850 APU with Radeon™ R3 Series | AMD".AMD.Archivedfrom the original on 4 May 2019.Retrieved5 May2019.
  27. ^"Intel® Atom™ Processor C Series Product Specifications".ark.intel.com.Retrieved2019-05-04.
  28. ^"Intel® Atom™ Processor Z Series Product Specifications".ark.intel.com.Retrieved2019-05-04.
  29. ^"Intel Preps Dual-Core Celeron Processors".11 October 2007. Archived fromthe originalon 4 November 2007.Retrieved12 November2007.
  30. ^"Intel® Celeron® Processor J Series Product Specifications".ark.intel.com.Retrieved2019-05-04.
  31. ^"Products formerly Yonah".ark.intel.com.Retrieved2019-05-04.
  32. ^"Products formerly Conroe".ark.intel.com.Retrieved2019-05-04.
  33. ^"Products formerly Kentsfield".ark.intel.com.Retrieved2019-05-04.
  34. ^"Intel® Core™ X-series Processors Product Specifications".ark.intel.com.Retrieved2019-05-04.
  35. ^"Intel® Itanium® Processor Product Specifications".ark.intel.com.Retrieved2019-05-04.
  36. ^"Intel® Pentium® Processor D Series Product Specifications".ark.intel.com.Retrieved2019-05-04.
  37. ^Zazaian, Mike (September 26, 2006)."Intel: 80 Cores by 2011".Archived fromthe originalon 2006-11-09.Retrieved2006-09-28.
  38. ^Kowaliski, Cyril (February 18, 2014)."Intel releases 15-core Xeon E7 v2 processor".Archivedfrom the original on 2014-10-11.
  39. ^"Intel Xeon Processor E7 v3 Family".Intel.Archivedfrom the original on 2015-07-07.
  40. ^"Intel Xeon Processor E7 v2 Family".Intel.Archivedfrom the original on 2015-07-07.
  41. ^"Intel Xeon Processor E3 v2 Family".Intel.Archivedfrom the original on 2015-07-07.
  42. ^"Intel shows off Xeon Platinum CPU with up to 56 cores and 112 threads".TechSpot.2 April 2019.Retrieved2019-05-04.
  43. ^PDF, Download."2nd Gen Intel® Xeon® Scalable Processors Brief".Intel.Retrieved2019-05-04.
  44. ^"Intel® Xeon Phi™ x100 Product Family Product Specifications".ark.intel.com.Retrieved2019-05-04.
  45. ^"Intel® Xeon Phi™ 72x5 Processor Family Product Specifications".ark.intel.com.Retrieved2019-05-04.
  46. ^Cole, Bernard (September 24, 2008)."40-core processor with Forth-based IDE tools unveiled".
  47. ^Hammond, Lance; et al. (1999).The Stanford Hydra CMP(PDF).Hot Chips.Retrieved27 June2023.
  48. ^Chacos, Brad (June 20, 2016)."Meet KiloCore, a 1,000-core processor so efficient it could run on a AA battery".PC World.Archivedfrom the original on June 23, 2016.
  49. ^"COSMIC:Statistical Multiprocessor Benchmark Suite".

Further reading

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  • Khondker S. Hasan; Nicolas G. Grounds; John K. Antonio (July 2011).Predicting CPU Availability of a Multi-core Processor Executing Concurrent Java Threads.17th International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA-11). Las Vegas, Nevada, USA. pp. 551–557.hdl:10657.1/2440.
  • Khondker S. Hasan; John Antonio; Sridhar Radhakrishnan (February 2014).A New Composite CPU/Memory Model for Predicting Efficiency of Multi-core Processing.The 20th IEEE International Conference on High Performance Computer Architecture (HPCA-14) workshop. Orlando, FL, USA.doi:10.13140/RG.2.1.3051.9207.
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