22 nm process

The"22 nm" nodeis the process step following32 nminCMOSMOSFETsemiconductor device fabrication.The typical half-pitch (i.e., half the distance between identical features in an array) for a memory cell using the process is around 22nm.It was first demonstrated bysemiconductor companiesfor use inRAMmemory in 2008. In 2010,Toshibabegan shipping 24 nmflash memorychips, andSamsung Electronicsbegan mass-producing 20 nm flash memory chips. The first consumer-levelCPUdeliveries using a 22 nm process started in April 2012 with theIntelIvy Bridgeprocessors.

Since at least 1997, "process nodes" have been named purely on a marketing basis, and have no relation to the dimensions on the integrated circuit;neither gate length, metal pitch or gate pitch on a "22nm" device is twenty-two nanometers.

TheITRS2006 Front End Process Update indicates that equivalent physical oxide thickness will not scale below 0.5 nm (about twice the diameter of asiliconatom), which is the expected value at the 22 nm node. This is an indication that CMOS scaling in this area has reached a wall at this point, possibly disturbingMoore's law.

The20-nanometrenode is an intermediate half-nodedie shrinkbased on the 22-nanometre process.

TSMCbegan mass production of 20nm nodes in 2014.The 22 nm process was superseded by commercial14 nmFinFETtechnology in 2014.

Technology demos

On August 18, 2008,AMD,Freescale,IBM,STMicroelectronics,Toshiba,and theCollege of Nanoscale Science and Engineering(CNSE) announced that they jointly developed and manufactured a 22 nmSRAMcell, built on a traditional six-transistordesign on a 300 mmwafer,which had a memory cell size of just 0.1μm².The cell was printed usingimmersion lithography.

The 22 nm node may be the first time where the gate length is not necessarily smaller than the technology node designation. For example, a 25 nm gate length would be typical for the 22 nm node.

On September 22, 2009, during theIntel Developer Forum Fall 2009,Intelshowed a 22 nm wafer and announced that chips with 22 nm technology would be available in the second half of 2011.SRAM cell size is said to be 0.092 μm²,smallest reported to date.

On January 3, 2010, Intel andMicron Technologyannounced the first in a family of 25 nmNANDdevices.

On May 2, 2011, Intel announced its first 22 nm microprocessor, codenamedIvy Bridge,using aFinFETtechnology called3-Dtri-gate.

IBM'sPOWER8processors are produced in a 22 nmSOIprocess.

Shipped devices

• Toshibaannounced that it was shipping 24 nmflash memoryNAND devices on August 31, 2010.
• In 2010,Samsung Electronicsbegan mass production of 64GbitNAND flashmemory chips using a 20 nm process.
• Also in 2010,Hynixintroduced a 64Gbit NAND flash memory chip using a 20 nm process.
• On April 23, 2012,Intel Corei7 and Intel Core i5 processors based on Intel'sIvy Bridge22 nm technology for series 7 chipsets went on sale worldwide.Volume production of 22 nm processors began more than six months earlier, as confirmed by formerIntelCEO Paul Otellini on October 19, 2011.
• On June 3, 2013, Intel started shipping Intel Core i7 and Intel Core i5 processors based on Intel'sHaswellmicroarchitecture in 22 nmtri-gateFinFETtechnology for series 8 chipsets.Intel's 22nm process has a transistor density of 16.5 million transistors per square milimeter (MTr/mm2).

References

Preceded by 32 nm(CMOS)

MOSFETmanufacturing processes

Succeeded by 14 nm(FinFET)