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Intel Quark

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Intel Galileo-board with Quark-processor

Intel Quarkis a line of32-bitx86SoCsandmicrocontrollersbyIntel,designed for small size and low power consumption, and targeted at new markets includingwearable devices.The line was introduced atIntel Developer Forumin 2013, and discontinued in January 2019.[1]

Quark processors, while slower thanAtomprocessors, are much smaller and consume less power. They lack support forSIMDinstruction sets (such asMMXandSSE)[2]and only supportembedded operating systems.

Quark powers the (now discontinued)Intel Galileodeveloper microcontroller board.[3]In 2016Arduinoreleased the Arduino 101 board that includes an Intel Quark SoC.[4][5]The CPUinstruction setis, for most models, the same as aPentium(P54C/i586) CPU.[6]

History[edit]

The first product in the Quark line is the single-core32 nmX1000SoCwith aclock rateof up to 400MHz.The system includes several interfaces, includingPCI Express,serialUART,I²C,Fast Ethernet,USB 2.0,SDIO,power management controller,andGPIO.There are 16kBof on-chipembeddedSRAMand an integratedDDR3memory controller.[7][8]

A second Intel product that includes Quark core, theIntel Edisonmicrocomputer, was presented in January 2014. It has aform factorclose to the size of anSD card,and is capable of wireless networking usingWi-FiorBluetooth.[9]

In January 2015, Intel announced thesub-miniatureIntel Curie module for wearable applications, based on aQuark SEcore with 80kBSRAMand 384 kBflash.[10]At the size of a button, it also features a 6-axis accelerometer, a DSP sensor hub, aBluetooth LEunit and a battery charge controller.

Intel announced the end-of-life of its Quark products in January 2019, with orders accepted until July 2019 and final shipments set for July 2022.[1][11]

List of processors[edit]

"Lakemont" (32 nm)[edit]

The nameLakemonthas been used in reference to the processor core in multiple Quark-series processors.[12]: 4 [13]: 42 

"Clanton"[edit]

Source:[14]

  • All models supporti586instruction set, withx87FPU andNX bit
  • Temperature range: -40 °C to +85 °C for X10x1 models, 0 °C to +70 °C, for X10x0 models
  • Secure bootsupported on X102xmodels
  • DDR3 controller with one 16-bit channel
  • Two PCI-Express 2.0 controllers, with 1 lane each.
  • USB Controller with two USB 2.0 Host ports and one USB 2.0 device port
  • Two 10/100 MBit Ethernet controllers
  • Integrated memory card reader supporting SDIO 3.0, eMMC 4.41 and SD 3.0
  • Serial I/O supporting SPI, UART (serial port) and I2C

(The L2 cache column shows the size of the L1 cache.)

Model sSpec
number
Cores Clock rate GPU
frequency
L2
cache
I/O bus Memory Voltage TDP Socket Release date Part
number(s)
Release
price (USD)
Quark X1000
  • SR1BY (A0)
1 400 MHz 16 KB PCIe DDR3-800 0.95–1.1 V
2.2 W
  • FC-BGA11E
Q4'13
  • DH8066101538300
$9.63
Quark X1001
  • SR1VB (A0)
1 400 MHz 16 KB PCIe DDR3-800 0.95–1.1 V
2.2 W
  • FC-BGA11E
Q2'14
  • DHQ1ET
$11.77
Quark X1010
  • SR1BZ (A0)
1 400 MHz 16 KB PCIe DDR3-800 (ECC) 0.95–1.1 V
2.2 W
  • FC-BGA11E
Q1'14
  • DH8066101555100
$10.16
Quark X1011
  • SR1VC (A0)
1 400 MHz 16 KB PCIe DDR3-800 (ECC) 0.95–1.1 V
2.2 W
  • FC-BGA11E
Q2'14
  • DHQ1ECCET
$12.31
Quark X1020
  • SR1VW (A0)
1 400 MHz 16 KB PCIe DDR3-800 (ECC) 0.95–1.1 V
2.2 W
  • FC-BGA11E
Q2'14
  • DHQ1ECCSECCTS1
$11.45
Quark X1020D
  • SR1BX (A0)
1 400 MHz 16 KB PCIe DDR3-800 (ECC) 0.95–1.1 V
2.2 W
  • FC-BGA11E
Q1'14
  • DH8066101531900
$10.70
Quark X1021
  • SR1WH (A0)
1 400 MHz 16 KB PCIe DDR3-800 (ECC) 0.95–1.1 V
2.2 W
  • FC-BGA11E
Q2'14
  • DHQ1ECCSECETS1
$13.39
Quark X1021D
  • SR1VA (A0)
1 400 MHz 16 KB PCIe DDR3-800 (ECC) 0.95–1.1 V
2.2 W
  • FC-BGA11E
Q2'14
  • DHQ1ECCSECET
$12.85

"Silver Butte"[edit]

  • Implements only a limited subset of the 32-bit x86 instruction set (e.g.segmentation,BCD/string instructions,AF/PFflags,XCHGare not supported)[15]
Model sSpec
number
Cores Clock rate GPU
frequency
L2
cache
I/O bus Memory Voltage TDP Socket Release date Part
number(s)
Release
price (USD)
Quark D1000
  • SLKMJ (B1)
1 32 MHz AHB-Lite,APB[16]: 30  eSRAM 1.62–3.63 V
  • 0.025 W
Q3'15
DMNIAD01SLVBT
$2.54

"Mint Valley"[edit]

  • Supportsi586instruction set, without x87.
Model sSpec
number
Cores Clock rate GPU
frequency
L2
cache
I/O bus Memory Voltage TDP Socket Release date Part
number(s)
Release
price (USD)
Quark D2000
  • SR2KF (A0)
1 32 MHz AHB-Lite,[13]: 72 APB[13]: 96  eSRAM 1.62–3.63 V
0.025 W
  • QFN40
Q3'15
FND2000
$2.54

"Atlas Peak"[edit]

  • Supportsi586instruction set, without x87.
Model sSpec
number
Cores Clock rate GPU
frequency
L2
cache
I/O bus Memory Voltage TDP Socket Release date Part
number(s)
Release
price (USD)
Quark SE C1000
  • SR2T6 (A0)
  • SR2TJ (A1)
1 32 MHz 8 KB AHB-Lite, APB eSRAM 1.8–3.3 V
0.025 W
  • VFBGA144
Q4'15
LMCQ1000
$10.32

Segfault bug[edit]

Intel Quark SoC X1000 contains a bug (#71538)[17]that "under specific circumstances" results in a type of crash known as asegfault.The workaround implemented by Intel is to omitLOCKprefixes (not required on single-threaded processors) in the compiled code.[18]While source-based embedded systems like those built using theYocto Projectcan incorporate this workaround at compile time, general purpose Linux distributions such asDebianare deeply affected by the bug. Such a workaround is not easy to implement in binaries meant to supportmultithreadingtoo as they require LOCK prefixes to function properly.[19]

See also[edit]

References[edit]

  1. ^ab"Product Change Notification 116715-00"(PDF).Intel Quality Document Management System.Intel. 2019-01-18.Archived(PDF)from the original on 2021-04-18.Retrieved2020-09-29.
  2. ^Turley, Jim (October 16, 2013)."Intel Quark Provides Spin, Charm, and Strange New Low-end x86 MCU Line Emerging from the Lab".EEJournal. Archived fromthe originalon January 8, 2014.
  3. ^"Intel® Galileo Datasheet".Archived fromthe originalon 2013-10-12.Retrieved2013-10-07.
  4. ^"Arduino 101".Archived fromthe originalon 2020-09-29.Retrieved2018-03-23.
  5. ^JavaFX 9 by Example, Chapter on Arduino
  6. ^"Intel Quark SoC X1000 Core - Developer's Manual".Archived fromthe originalon 2014-10-19.Retrieved2014-10-19.
  7. ^Flaherty, Nick (2013-10-07)."Intel Tackles SoC With Quark".EETimes. Archived fromthe originalon 29 February 2016.Retrieved9 October2013.
  8. ^Intel® Quark SoC X1000 (16K Cache, 400 MHz) SpecificationsArchived2014-01-08 at theWayback Machine,Intel
  9. ^Gareth Halfacree (7 January 2014)."Intel unveils Quark-based Edison microcomputer".BitTech.Archivedfrom the original on 2014-01-10.Retrieved2014-01-07.
  10. ^"Intel® Curie Module: Unleashing Wearable Device Innovation".Intel. 2015-01-06.Archivedfrom the original on 2015-09-06.Retrieved12 April2015.
  11. ^Shilov, Anton (2019-01-22)."Intel Discontinues Quark SoCs and Microcontrollers".AnandTech.Archivedfrom the original on 2020-11-30.Retrieved2020-09-29.
  12. ^Intel Quark SoC X1000 Debug Operations.Intel Corporation. 2014.
  13. ^abcIntel Quark microcontroller D2000.Intel Corporation. 2015.
  14. ^Intel,Quark SoC X1000 Datasheet,May 2014.Archivedon Mar 16, 2022.
  15. ^Intel,Quark Microcontroller D1000 Programmer's Reference Manual,order no. 332913-02, nov 2015, page 14.Archivedon Apr 13, 2021.
  16. ^Intel Quark Microcontroller D1000 Datasheet.Intel Corporation. 2015.Archivedfrom the original on 2016-02-23.Retrieved2016-02-15.
  17. ^"Intel Quark SoC X1000 Software - Release Notes"(PDF).Revision 002. 22 May 2014. p. 21.Archived(PDF)from the original on 1 August 2020.Retrieved17 February2020.
  18. ^"[email protected]: Bug#738575: pthread: segfault in libpthread on Intel Galileo board".Archivedfrom the original on 2021-02-09.Retrieved2016-11-11.
  19. ^"#738575 - pthread: Segfault in libpthread on Intel Galileo board - Debian Bug report logs".Archivedfrom the original on 2019-04-17.Retrieved2014-12-04.

External links[edit]