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Pin grid array

From Wikipedia, the free encyclopedia
Closeup of the pins of a pin grid array
The pin grid array at the bottom of a XC68020, a prototype of theMotorola 68020microprocessor
The pin grid array on the bottom of anAMD PhenomX4 9750 processor that uses the AMDAM2+ socket

Apin grid array(PGA) is a type ofintegrated circuit packaging.In a PGA, the package is square or rectangular, and the pins are arranged in a regular array on the underside of the package. The pins are commonly spaced 2.54 mm (0.1 ") apart,[1]and may or may not cover the entire underside of the package.

PGAs are often mounted onprinted circuit boardsusing thethrough holemethod or inserted into asocket.PGAs allow for more pins per integrated circuit than older packages, such asdual in-line package(DIP).

Chip mounting[edit]

Underside of an 80486 with lid removed shows die and wire bonded connections.

The chip can be mounted either on the top or the bottom (the pinned side). Connections can be made either bywire bondingor throughflip chipmounting. Typically, PGA packages use wire bonding when the chip is mounted on the pinned side, and flip chip construction when the chip is on the top side. Some PGA packages contain multiple dies, for exampleZen 2andZen 3Ryzen CPUs for theAM4 socket.

Flip chip[edit]

The underside of a FC-PGA package (The die is on the other side.)

Aflip-chippin grid array (FC-PGA or FCPGA) is a form of pin grid array in which thediefaces downwards on the top of the substrate with the back of the die exposed. This allows the die to have a more direct contact with theheatsinkor other cooling mechanism.

FC-PGA CPUs were introduced byIntelin 1999, for Coppermine corePentium IIIandCeleron[2]processors based onSocket 370,and were produced untilSocket G3in 2013. FC-PGA processors fit intozero insertion force(ZIF)motherboard sockets;similar packages were also used by AMD.

Material[edit]

Ceramic[edit]

A ceramic pin grid array (CPGA) is a type of packaging used byintegrated circuits.This type of packaging uses a ceramic substrate with pins arranged in a pin grid array. SomeCPUsthat use CPGA packaging are the AMDSocket AAthlonsand theDuron.

A CPGA was used by AMD for Athlon and Duron processors based on Socket A, as well as some AMD processors based onSocket AM2andSocket AM2+.While similar form factors have been used by other manufacturers, they are not officially referred to as CPGA. This type of packaging uses aceramicsubstrate with pins arranged in an array.

  • A 1.2 GHz VIA C3 microprocessor in a ceramic package
    A 1.2 GHzVIA C3microprocessor in a ceramic package
  • 133 MHz Pentium chip in a ceramic package
    133 MHz Pentium chip in a ceramic package

Organic[edit]

Demonstration of a PGA-ZIF socket (AMD 754)

An organic pin grid array (OPGA) is a type of connection forintegrated circuits,and especiallyCPUs,where thesilicondieis attached to a plate made out of anorganicplasticwhich is pierced by an array ofpinswhich make the requisite connections to thesocket.

  • The underside of a Celeron-400 in a PPGA
    The underside of aCeleron-400 in a PPGA
  • An OPGA CPU. Note the brown color – many OPGA parts are colored green. The die is in the center of the device, and the four gray circles are foam spacers to relieve pressure from the die, caused by the heat sink.
    An OPGA CPU. Note the brown color – many OPGA parts are colored green. The die is in the center of the device, and the four gray circles are foam spacers to relieve pressure from the die, caused by the heat sink.

Plastic[edit]

The topside of aCeleron-400 in a PPGA packing

Plastic pin grid array (PPGA) packaging was used by Intel for late-model Mendocino coreCeleronprocessors based onSocket 370.[3]Some pre-Socket 8 processors also used a similar form factor, although they were not officially referred to as PPGA.

Underside of aPentium 4in a PGA package

Pin layout[edit]

Staggered pin[edit]

The staggered pin grid array (SPGA) is used by Intel processors based onSocket 5andSocket 7.Socket 8used a partial SPGA layout on half the processor.

An example of a socket for a staggered pin grid array package
View of the socket 7 321-pin connectors of a CPU

It consists of two square arrays of pins, offset in both directions by half the minimum distance between pins in one of the arrays. Put differently: within a square boundary the pins form a diagonal squarelattice.There is generally a section in the center of the package without any pins. SPGA packages are usually used by devices that require a higher pin density than what a PGA can provide, such asmicroprocessors.

Stud[edit]

A stud grid array (SGA) is a short-pinned pin grid array chip scale package for use insurface-mount technology.The polymer stud grid array or plastic stud grid array was developed jointly by theInteruniversity Microelectronics Centre(IMEC) andLaboratory for Production Technology,Siemens AG.[4][5]

rPGA[edit]

The reduced pin grid array was used by the socketed mobile variants of Intel's Core i3/5/7 processors and features a reduced pin pitch of 1mm,[6]as opposed to the 1.27mm pin pitch used by contemporary AMD processors and older Intel processors. It is used in theG1,G2,andG3sockets.

See also[edit]

References[edit]

  1. ^Vijay Nath (24 March 2017).Proceedings of the International Conference on Nano-electronics, Circuits & Communication Systems.Springer. p. 304.ISBN978-981-10-2999-8.
  2. ^"Intel Releases New Design for sub-$1,000 PCs". Philippine Daily Inquirer. April 24, 2000.{{cite web}}:Missing or empty|url=(help)
  3. ^Robert Bruce Thompson; Barbara Fritchman Thompson (24 July 2003).PC Hardware in a Nutshell: A Desktop Quick Reference.O'Reilly Media, Inc. p. 44.ISBN978-0-596-55234-3.
  4. ^"BGA socket/BGA 소켓".Jsits.Retrieved2015-06-05.
  5. ^link(in German)ArchivedOctober 1, 2011, at theWayback Machine
  6. ^"Molex Sockets for Servers, Desktops and Notebooks Earn Intel® Validation".Archived fromthe originalon 2019-12-09.Retrieved2016-03-15.

Sources[edit]

External links[edit]

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